The Inquirer is reporting a possible Penryn pull into 1H07.
http://theinquirer.net/default.aspx?article=37562
Pulling in this process by 6 months is unlikely. However, I'm predicting a 1 quarter pull in to end Q307 for the first Penryn to ship. For the people who want clarity - what this means is product will be shipped to OEM &/or channel but does not necessarily mean widespread availability. It also will not be across the board Penryn up and down the product line up. The fact that the sillicon was able to boot 5 OSes and 2 factories seem to be on schedule to ramp in 2H07 means this is quite possible. And Intel needs to continue to show Wall Street and their customers they are executing at every step.
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Why don't you bother quoting the important parts of the article.
"You are pulling in 45 nanometres with the attendant expenses and losing quarter of the life of your 65 nanometre process. These are billion dollar footnotes, not trivial little things. Even if it can, Intel may choose not to for financial reasons."
"The tools are the critical components, and they may or may not be done in time for Intel to pull the schedule in."
This is still, according the inquirer at least, a big "IF". Also, in my previous post, I meant to say "production starts in 2h07, meaning no available product until an entire set of wafers has finished going through production, is shipped to retailers, and then has accumulated in large enough quantity to be sold by retailers.
Greg - I don't always subscribe to the Inquirer's POV. I'm sure they get a lot of inside scoop and a lot of stuff more air and less substance so you have to learn sort the wheat from the chaff. I provided the link just to show I'm not alone but I would not advise anyone to go by the Inquirer alone.
WRT the cost factors, Charlie is not calculating the cost savings of moving to 45nm from 65nm and balancing that against the tool costs so his perspective does not take everything into account. I'm not saying those are the only criteria - but I am saying that it's not as simple a decision as Charlie points out. However, I do believe Intel needs to continue to shore up confidence in the stock and every time they seem to be executing to or ahead of their plan helps them concretize that impression. And I think this will be a key consideration in their decision making. I'm sure we will have a resolution to this timeline in the next 2-3 months.
Sorry Greg - one more thing. I did clarify what I meant by Penryn availability in my post.
On cost impact of moving to 65nm early... this is not a "billion dollar footnote".
What Charlie does not understand is that Intel overlaps there manufacturing processes so it is not like they are ripping out and throwing away 65nm equipment in order to ramp 45nm. The "cost" of the pull-in of the ramp (assuming yield is OK,designs are ready, etc...) is the early capital expenditure. Additionally ~70% of the equipment between one tech node and the next is the same.
As anyone with even a simple economics background could tell you - as this money would be spent anyway, the true cost of the pull-in is the NPV (net present value) of the money being spent 6 months early. This is peanuts (<100Mil)...not billions...
Given Charlie's lack of basic manufacturing knowledge and economics I have a hard time believing anything he or the rest of the INQ prints on the subject (unless it has a source that it is linked to). That said D1d is probably already mostly built out for 45nm production so Intel probably could get a fair amount of production out early (assuming the yields are OK). Also what AMD fans fail to understand is the combined 65nm/45nm output of D1d is roughly equivalent to F36 - they just assume this is not the case because it is a "development fab". D1d alone will be able to produce >10K WSPM of 45nm while still producing 65nm (which is >10K WSPM)
Thanks Anonymous...
The other thing is it does not help Intel to have 45nm Fabs/equipment sitting around doing nothing while they are taking depreciation on those multi-billion $ investments off their books. As I said, Charlie's assessment is too superficial to go by.
The actual decision of when to begin production on D1D is based both on yield and errata. As I've already said, you can patch serious errata by running a software fix from the BIOS at startup. This can allow you to run an OS demo for example however the patch takes away a good chunk of processor time so you can't benchmark with it running unless you want your chips to look shabby.
D1D is indeed at a state where it could begin 45nm production however as I've said before the output is not nearly as high as has been suggested. D1D only has about 1/3rd the capacity of a regular production FAB at Intel. Comparisons with AMD's FABs are misleading because Intel's FABs are larger. AMD only devotes about 10% of wafers at FAB 36 to testing. However, at D1D this would be more like 30-40% of wafers. This is true because D1D not only does revision mask testing but all process testing. In contrast, process testing for AMD, IBM, Sony, and Toshiba is done mostly at IBM.
Didn't Intel say that they were at least they year ahead of everybody else in the industry? AMD said that they would be making their 45nm chips in 2H 2008 (Which I don't think they will because they've only been using 65nm for 2 months, so I think they won't get it until Q1 2009). Intel also said that they would have their first quad core in Q1 2007 but they started shipping them in November 2006, so I think that using the past and using AMD's prediction Sharikou's predictions are pretty close to acurate
"D1D only has about 1/3rd the capacity of a regular production FAB at Intel"
This is patently false! The capacity of D1d is very similar to other Intel fabs with a couple of qualifications - it is running both 65nm (production) and 45nm (final developement --> production) right now.
The difference is the overall capacity is split between 2 technology nodes and development line capacity. If you combine all of the capacity it is >7000 WSPW which is >28000 WSPM (i.e as big/bigger than AMD's F36!) And this is with the inefficiencies of having 2 technology nodes running in the same building as well as committing some of the capacity for development.
Also while D1d does the bulk of process development and testing, when the process is transferred to other fabs, they also support some process testing to further improve yields, binsplits, fmax, etc... D1d owns all of the process testing prior to process transfer, after that it is shared by all of the fabs.
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